"IDE - hardware reference & information document" - читать интересную книгу автора (Ivopol A.)

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5. Register Address Decoding

The host addresses the drive with programmed I/O. Host address lines
A0, A1, A2, chip select CS1FX- and CS3FX-, IOR- and IOW- address the
disk registers. Host address lines A3...A9 generate the two chip
selects: CS1FX- and CS3FX-.

Chip select CS1FX- accesses the eight hard disk Command Block
Registers. Chip select CS3FX- is valid during 8 bit transfers to/from
the Control Block registers alternate status and Device Control, and
drive address.

The drive selects the primary or alternate command block addresses
using address bit A7.

(Note: What the above sentence means is that there is a provision for
a primary host adapter at I/O address 1FX/3FX and a secondary host
adapter at I/O adress 17X/37X. Each host adapter can have up to two
hard drives MASTER/SLAVED off it).

See below for a graphical explanation:

HEX BINARY DESCRIPTION

1FX 0001 1111 XXXX Primary Command Registers
3FX 0011 1111 XXXX Primary Control Registers

17X 0001 0111 XXXX Alternate Command Registers
37X 0011 0111 XXXX Alternate Control Registers

^
|
+--- Address bit A7

X means "don't care" i.e. X can be 0h, 1h, 2h, ..., Dh, Eh, Fh or 0b,
1b).

Data bus lines D8...D15 are valid only when IOCS16- is active and the
drive is transferring data. The transfer of ECC information occurs
only on data bus lines D0...D7 and data bus lines D8...D15 are invalid
during such transfer.

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6. Pin Descriptions